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MC68HC08AS32 Datasheet, PDF (38/280 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)
pump generates the program voltage and applies it to the user
EEPROM array. When the EEPGM bit is cleared, the program voltage
is removed from the array and the internal charge pump is turned off.
d. Any attempt to clear both EEPGM and EELAT bits with a single
instruction will clear only EEPGM to allow time for removal of high
voltage from the EEPROM array.
2.5.1.2 EEPROM Erasing
The unprogrammed state is a logic 1. Only the valid EEPROM bytes in the
non-protected blocks and EENVR can be erased. When the array is configured in
the redundant mode, erasing the first 256 bytes ($0800–$08FF) also will erase the
last 256 bytes ($0900–$09FF).
Follow this procedure to erase EEPROM. Refer to for timing values.
1. Clear/set EERAS1 and EERAS0 to select byte/block/bulk erase, and set
EELAT in EECTL. Set value of tEEBYT/tEEBLOCK/tEEBULK. (See Note a.)
2. Write any data to the desired address for byte erase, to any address in the
desired block for block erase, or to any array address for bulk erase.
3. Set the EEPGM bit. (See Note b.)
4. Wait for a time, tEEPGM, to program the byte.
5. Clear EEPGM bit.
6. Wait for the erasing voltage time to fall, tEEFPV.
7. Clear EELAT bits. (See Note c.)
8. Repeat steps 1 through 7 for more EEPROM byte/block erasing.
EEBPx bit must be cleared to erase EEPROM data in the corresponding block. If
any EEBPx is set, the corresponding block cannot be erased and bulk erase mode
does not apply.
NOTES:
a. Setting the EELAT bit configures the address and data buses to latch
data for erasing the array. Only valid EEPROM addresses with their
data will be latched. If another consecutive valid EEPROM write
occurs, this address and data will override the previous address and
data. In block erase mode, any EEPROM address in the block can be
used in step 2. All locations within this block will be erased. In bulk
erase mode, any EEPROM address can be used to erase the whole
EEPROM. EENVR is not affected with block or bulk erase. Any
attempts to read other EEPROM data will read the latched data. If
EELAT is set, other writes to the EECR will be allowed after a valid
EEPROM write.
b. To ensure the proper erasing sequence, the EEPGM bit cannot be set
if the EELAT bit is cleared and a non-EEPROM write has occurred.
Once EEPGM is set, the type of erase mode cannot be modified. If
EEPGM is set, the on-board charge pump generates the erase voltage
Data Sheet
38
MC68HC08AS32 — Rev. 4.1
Freescale Semiconductor