MC68HC08AS32 Datasheet, PDF (191/280 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

13.4 SIM Counter
The SIM counter is used by the power-on reset module (POR) and in stop mode
recovery to allow the oscillator time to stabilize before enabling the internal bus
(IBUS) clocks. The SIM counter also serves as a prescaler for the computer
operating properly (COP) module. The SIM counter overflow supplies the clock for
the COP module. The SIM counter is 12 bits long and is clocked by the falling edge
of CGMXCLK.
13.4.1 SIM Counter During Power-On Reset
The power-on reset module (POR) detects power applied to the MCU. At
power-on, the POR circuit asserts the signal PORRST. Once the SIM is initialized,
it enables the clock generation module (CGM) to drive the bus clock state machine.
13.4.2 SIM Counter During Stop Mode Recovery
The SIM counter also is used for stop mode recovery. The STOP instruction clears
the SIM counter. After an interrupt, break, or reset, the SIM senses the state of the
short stop recovery bit, SSREC, in the MOR register. If the SSREC bit is a logic 1,
then the stop recovery is reduced from the normal delay of 4096 CGMXCLK cycles
down to 32 CGMXCLK cycles. This is ideal for applications using canned
oscillators that do not require long startup times from stop mode. External crystal
applications should use the full stop recovery time with SSREC cleared.
13.4.3 SIM Counter and Reset States
External reset has no effect on the SIM counter. (See 13.6.2 Stop Mode for
details.) The SIM counter is free-running after all reset states. (See 13.3.2 Active
Resets from Internal Sources for counter control and internal reset recovery
sequences.)
13.5 Program Exception Control
Normal, sequential program execution can be changed in three different ways:
• Interrupts:
– Maskable hardware CPU interrupts
– Non-maskable software interrupt instruction (SWI)
• Reset
• Break interrupts
MC68HC08AS32 — Rev. 4.1
Freescale Semiconductor
Data Sheet
191