MC68HC08AS32 Datasheet, PDF (199/280 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

13.7.2 SIM Reset Status Register
This register contains six flags that show the source of the last reset. The status
register will clear automatically after reading it. A power-on reset sets the POR bit
and clears all other bits in the register.
Address: $FE01
Bit 7
6
5
4
3
2
Read: POR
PIN
COP
ILOP
ILAD
0
Write: R
R
R
R
R
R
Reset:
1
0
0
0
0
0
R
= Reserved
1
Bit 0
LVI
0
R
R
0
0
Figure 13-19. SIM Reset Status Register (SRSR)
POR — Power-On Reset Bit
1 = Last reset caused by POR circuit
0 = Read of SRSR
PIN — External Reset Bit
1 = Last reset caused by external reset pin (RST)
0 = POR or read of SRSR
COP — Computer Operating Properly Reset Bit
1 = Last reset caused by COP counter
0 = POR or read of SRSR
ILOP — Illegal Opcode Reset Bit
1 = Last reset caused by an illegal opcode
0 = POR or read of SRSR
ILAD — Illegal Address Reset Bit (opcode fetches only)
1 = Last reset caused by an opcode fetch from an illegal address
0 = POR or read of SRSR
LVI — Low-Voltage Inhibit Reset Bit
1 = Last reset was caused by the LVI circuit
0 = POR or read of SRSR
MC68HC08AS32 — Rev. 4.1
Freescale Semiconductor
Data Sheet
199