MC68HC08AS32 Datasheet, PDF (129/280 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Addr.
$001A
Register Name
Bit 7
IRQ Status and Control ^Read:
0
Register (ISCR) Write:
R
See page 132. _Reset:
0
R
6
5
0
0
R
R
0
0
= Reserved
4
3
0
IRQF
R
R
0
0
Figure 8-3. IRQ I/O Register Summary
2
0
ACK1
0
1
IMASK
0
Bit 0
MODE1
0
Interrupt signals on the IRQ pin are latched into the IRQ latch. An interrupt latch
remains set until one of the following actions occurs:
• Vector fetch — A vector fetch automatically generates an interrupt
acknowledge signal that clears the latch that caused the vector fetch.
• Software clear — Software can clear an interrupt latch by writing to the
appropriate acknowledge bit in the interrupt status and control register
(ISCR). Writing a logic 1 to the ACK bit clears the IRQ latch.
• Reset — A reset automatically clears both interrupt latches.
NOTE:
The external interrupt pin is falling-edge triggered and is software configurable to
be both falling-edge and low-level triggered. The MODE bit in the ISCR controls the
triggering sensitivity of the IRQ pin.
When an interrupt pin is edge-triggered only, the interrupt latch remains set until a
vector fetch, software clear, or reset occurs.
When an interrupt pin is both falling-edge and low-level triggered, the interrupt latch
remains set until both of the following occur:
• Vector fetch or software clear
• Return of the interrupt pin to logic 1
The vector fetch or software clear may occur before or after the interrupt pin returns
to logic 1. As long as the pin is low, the interrupt request remains pending. A reset
will clear the latch and the MODE control bit, thereby clearing the interrupt even if
the pin stays low.
When set, the IMASK bit in the ISCR masks all external interrupt requests. A
latched interrupt request is not presented to the interrupt priority logic unless the
corresponding IMASK bit is clear.
The interrupt mask (I) in the condition code register (CCR) masks all interrupt
requests, including external interrupt requests. (See Figure 8-4.)
MC68HC08AS32 — Rev. 4.1
Freescale Semiconductor
Data Sheet
129