MC68HC08AS32 Datasheet, PDF (33/280 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

Addr.
$0034
$0035
$0036
$0037
$0038
$0039
$003A
$003B
$003C
$003D
$003E
$003F
$FE00
Register Name
Timer Channel 4 Register Low ^Read:
(TCH4L) Write:
See page 248. _Reset:
Timer Channel 5 Status and ^Read:
Control Register (TSC5) Write:
See page 244. _Reset:
Timer Channel 5 Register High ^Read:
(TCH5H) Write:
See page 248. _Reset:
Timer Channel 5 Register Low ^Read:
(TCH5L) Write:
See page 248. _Reset:
Analog-to-Digital Status and ^Read:
Control Register (ADSCR) Write:
See page 50. _Reset:
Analog-to-Digital Data Register ^Read:
(ADR) Write:
See page 52. _Reset:
Analog-to-Digital Input Clock ^Read:
Register (ADICLK) Write:
See page 52. _Reset:
BDLC Analog and Roundtrip ^Read:
Delay Register (BARD) Write:
See page 77. _Reset:
BDLC Control Register 1 ^Read:
(BCR1) Write:
See page 78. _Reset:
BDLC Control Register 2 ^Read:
(BCR2) Write:
See page 80. _Reset:
BDLC State Vector Register ^Read:
(BSVR) Write:
See page 85. _Reset:
BDLC Data Register ^Read:
(BDR) Write:
See page 87. _Reset:
SIM Break Status Register ^Read:
(SBSR) Write:
See page 198. _Reset:
Bit 7
Bit 7
CH5F
0
0
Bit 15
Bit 7
COCO
R
0
AD7
R
ADIV2
0
ATE
1
IMSG
1
ALOOP
1
0
R
0
BD7
R
R
6
6
CH5IE
0
14
6
AIEN
0
AD6
R
ADIV1
0
RXPOL
1
CLKS
1
DLOOP
1
0
R
0
BD6
R
5
4
3
5
4
3
Indeterminate after reset
0
R
MS5A ELS5B
0
0
0
13
12
11
Indeterminate after reset
5
4
3
Indeterminate after reset
ADCO ADCH4 ADCH3
0
AD5
R
ADIV0
0
0
R
0
R1
1
1
1
AD4
AD3
R
R
Unaffected by reset
ADICLK
0
R
0
0
0
R
BO3
0
0
R0
0
R
0
0
RX4XE
NBFS
TEOD
0
0
0
I3
I2
I1
R
R
R
0
0
0
BD5
BD4
BD3
Unaffected by reset
R
R
R
= Reserved
U = Unaffected
2
2
ELS5A
0
10
2
ADCH2
1
AD2
R
0
R
0
BO2
1
0
R
0
TSIFR
0
I0
R
0
BD2
R
Figure 2-2. Control, Status, and Data Register (Sheet 5 of 6)
1
Bit 0
1
Bit 0
TOV5
0
9
CH5MAX
0
Bit 8
1
Bit 0
ADCH1
1
AD1
R
ADCH0
1
AD0
R
0
0
R
R
0
0
BO1
BO0
1
1
IE
WCM
0
0
TMIFR1 TMIFR0
0
0
0
0
R
R
0
0
BD1
BD0
SBSW
R
0
MC68HC08AS32 — Rev. 4.1
Freescale Semiconductor
Data Sheet
33