MC68HC08AS32 Datasheet, PDF (50/280 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

3.7 I/O Registers
These I/O registers control and monitor ADC operation:
• ADC status and control register (ADSCR)
• ADC data register (ADR)
• ADC input clock register (ADICLK)
3.7.1 ADC Status and Control Register
The following paragraphs describe the function of the ADC status and control
register.
Address:
Read:
Write:
Reset:
$0038
Bit 7
COCO
R
0
R
6
5
AIEN
ADCO
0
0
= Reserved
4
ADCH4
1
3
ADCH3
1
2
ADCH2
1
1
ADCH1
1
Figure 3-3. ADC Status and Control Register (ADSCR)
Bit 0
ADCH0
1
NOTE:
COCO — Conversions Complete Bit
In non-interrupt mode (AIEN = 0), COCO is a read-only bit that is set at the end
of each conversion. COCO will stay set until cleared by a read of the ADC data
register. Reset clears this bit.
In interrupt mode (AIEN = 1), COCO is a read-only bit that is not set at the end
of a conversion. It always reads as a logic 0.
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0) or CPU interrupt enabled
(AIEN = 1)
The write function of the COCO bit is reserved. When writing to the ADSCR
register, always have a 0 in the COCO bit position.
AIEN — ADC Interrupt Enable Bit
When this bit is set, an interrupt is generated at the end of an ADC conversion.
The interrupt signal is cleared when the data register is read or the status/control
register is written. Reset clears the AIEN bit.
1 = ADC interrupt enabled
0 = ADC interrupt disabled
Data Sheet
50
MC68HC08AS32 — Rev. 4.1
Freescale Semiconductor