MC68HC08AS32 Datasheet, PDF (69/280 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

See Figure 4-10(2). If the passive-to-active received transition beginning the
SOF symbol of the next message occurs between c and d, the current symbol
will be considered a valid EOF symbol followed by a valid inter-frame separation
symbol (IFS). All nodes must wait until a valid IFS symbol time has expired
before beginning transmission. However, due to variations in clock frequencies
and bus loading, some nodes may recognize a valid IFS symbol before others
and immediately begin transmitting. Therefore, any time a node waiting to
transmit detects a passive-to-active transition once a valid EOF has been
detected, it should immediately begin transmission, initiating the arbitration
process.
Idle Bus
In Figure 4-10(2), if the passive-to-active received transition beginning the
start-of-frame (SOF) symbol of the next message does not occur before d, the
bus is considered to be idle, and any node wishing to transmit a message may
do so immediately.
200 µs
128 µs
64 µs
ACTIVE
(1) INVALID ACTIVE BIT
PASSIVE
a
ACTIVE
(2) VALID ACTIVE LOGIC 1
PASSIVE
a
b
ACTIVE
(3) VALID ACTIVE LOGIC 0
PASSIVE
ACTIVE
b
c
(4) VALID SOF SYMBOL
PASSIVE
c
d
Figure 4-11. J1850 VPW Received Active Symbol Times
Invalid Active Bit
In Figure 4-11(1), if the active-to-passive received transition beginning the next
data bit (or symbol) occurs between the passive-to-active transition beginning
the current data bit (or symbol) and a, the current bit would be invalid.
MC68HC08AS32 — Rev. 4.1
Freescale Semiconductor
Data Sheet
69