MC68HC08AS32 Datasheet, PDF (267/280 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

17.7 5.0-Vdc ± 10% Serial Peripheral Interface (SPI) Timing
Num⁽¹⁾
Characteristic⁽²⁾
Symbol
Min
Max
Unit
Operating frequency⁽³⁾
Master
Slave
f_BUS(M)
f_BUS(S)
f_BUS/128
dc
f_BUS/2
f_BUS
MHz
Cycle time
1
Master
Slave
t_CYC(M)
2
t_CYC(S)
1
128
t_CYC
—
2
Enable lead time
t_Lead
15
—
ns
3
Enable lag time
t_Lag
15
—
ns
Clock (SCK) high time
4
Master
Slave
t_W(SCKH)M
100
t_W(SCKH)S
50
—
ns
—
Clock (SCK) low time
5
Master
Slave
t_W(SCKL)M
100
t_W(SCKL)S
50
—
ns
—
Data setup time, inputs
6
Master
Slave
t_SU(M)
45
t_SU(S)
5
—
ns
—
Data hold time, inputs
7
Master
Slave
t_H(M)
0
t_H(S)
15
—
ns
—
Access time, slave⁽⁴⁾
8
CPHA = 0
CPHA = 1
t_A(CP0)
0
t_A(CP1)
0
40
ns
20
9
Slave disable time, hold time to high-impedance state
t_DIS
—
25
ns
Enable edge lead time to data valid⁽⁵⁾
10
Master
Slave
t_EV(M)
—
t_EV(S)
—
10
ns
40
Enable edge lead time to data invalid
11
Master
Slave
t_EI(M)
0
t_EI(S)
5
—
ns
—
12
Data valid
Master (before capture edge)
t_V(M)
90
---
ns
13
Data hold time (outputs)
Master (after capture edge)
t_HO(M)
100
---
ns
1. Item numbers refer to dimensions in Figure 17-1 and Figure 17-2.
2. All timing is shown with respect to 30% V_DD and 70% V_DD, unless otherwise noted; assumes 100 pF load on all SPI pins.
3. f_BUS = the currently active bus frequency for the microcontroller.
4. Time to data active from high-impedance state
5. With 100 pF on all SPI pins
MC68HC08AS32 — Rev. 4.1
Freescale Semiconductor
Data Sheet
267