MC68HC08AS32 Datasheet, PDF (94/280 Pages) Motorola, Inc – M68HC08 Family of 8-bit microcontroller units (MCUs)

• The LOCK bit is a read-only indicator of the locked state of the PLL.
• The LOCK bit is set when the VCO frequency is within a certain tolerance,
∆_LOCK, and is cleared when the VCO frequency is out of a certain tolerance,
∆_UNL. (See 5.9 Acquisition/Lock Time Specifications for more
information.)
• CPU interrupts can occur if enabled (PLLIE = 1) when the PLL’s lock
condition changes, toggling the LOCK bit. (See 5.5.1 PLL Control
Register.)
The PLL also can operate in manual mode (AUTO = 0). Manual mode is used by
systems that do not require an indicator of the lock condition for proper operation.
Such systems typically operate well below f_BUSMAX and require fast startup.
The following conditions apply when in manual mode:
• ACQ is a writable control bit that controls the mode of the filter. Before
turning on the PLL in manual mode, the ACQ bit must be clear.
• Before entering tracking mode (ACQ = 1), software must wait a given time,
t_ACQ (see 5.9 Acquisition/Lock Time Specifications), after turning on the
PLL by setting PLLON in the PLL control register (PCTL).
• Software must wait a given time, t_AL, after entering tracking mode before
selecting the PLL as the clock source to CGMOUT
(BCS = 1).
• The LOCK bit is disabled.
• CPU interrupts from the CGM are disabled.
5.3.2.4 Programming the PLL
Use this procedure to program the PLL:
1. Choose the desired bus frequency, f_BUSDES.
Example: f_BUSDES = 8 MHz
2. Calculate the desired VCO frequency, f_VCLKDES.
f_VCLKDES = 4 × f_BUSDES
Example: f_VCLKDES = 4 × 8 MHz = 32 MHz
NOTE:
3. Using a reference frequency, f_RCLK, equal to the crystal frequency, calculate
the VCO frequency multiplier, N.
The round function means that the result is rounded to the nearest integer.
N = round_ ^f--^V---f^C--_R-^L--_C-^K---_LD--_K-^E----^S-_
Example: N = ^{3----2-----M-----H----z--} = 8
4 MHz
Data Sheet
94
MC68HC08AS32 — Rev. 4.1
Freescale Semiconductor