MC9S12HZ256 Datasheet, PDF (67/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 2 256 Kbyte Flash Module (FTS256K2V1)
2.3.2.3 Flash Test Mode Register (FTSTMOD)
The unbanked FTSTMOD register is used to control Flash test features.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
WRALL
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-6. Flash Test Mode Register (FTSTMOD)
All bits read 0 and are not writable in normal mode. The WRALL bit is writable only in special mode to
simplify mass erase and erase verify operations. When writing to the FTSTMOD register in special mode,
all unimplemented/reserved bits must be written to 0.
Table 2-8. FTSTMOD Field Descriptions
Field
4
WRALL
Description
Write to All Register Banks — If the WRALL bit is set, all banked registers sharing the same register address
will be written simultaneously during a register write.
0 Write only to the bank selected via BKSEL.
1 Write to all register banks.
2.3.2.4 Flash Configuration Register (FCNFG)
The unbanked FCNFG register enables the Flash interrupts and gates the security backdoor writes.
R
W
Reset
7
CBEIE
0
6
5
4
3
2
0
0
0
CCIE
KEYACC
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-7. Flash Configuration Register (FCNFG)
1
0
0
BKSEL
0
0
CBEIE, CCIE, KEYACC and BKSEL bits are readable and writable while all remaining bits read 0 and
are not writable. KEYACC is only writable if KEYEN (see Section 2.3.2.2) is set to the enabled state.
MC9S12HZ256 Data Sheet, Rev. 2.04
Freescale Semiconductor
67