MC9S12HZ256 Datasheet, PDF (644/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Appendix A Electrical Characteristics
A.5.3 Phase Locked Loop
The oscillator provides the reference clock for the PLL. The PLL´s Voltage Controlled Oscillator (VCO)
is also the system clock source in self clock mode.
A.5.3.1 XFC Component Selection
This section describes the selection of the XFC components to achieve a good filter characteristics.
VDDPLL
C_s
C_p
R
f_osc
1
f_ref
refdv+1
Phase
∆
K_Φ
VCO
K_V
f_vco
Detector
f_cmp
Loop Divider
1
1
synr+1
2
Figure A-3. Basic PLL Functional Diagram
The following procedure can be used to calculate the resistance and capacitance values using typical values
for K₁, f₁ and i_ch from Table A-17.
The VCO Gain at the desired VCO output frequency is approximated by:
K_V = K₁ ⋅ e^{-(--fK--1--1--–--⋅--f-1-v--c-V--o---)}
The phase detector relationship is given by:
K_Φ = i_ch ⋅ K_V
i_ch is the current in tracking mode.
The loop bandwidth f_C should be chosen to fulfill the Gardner’s stability criteria by at least a factor of 10,
typical values are 50. ζ = 0.9 ensures a good transient response.
MC9S12HZ256 Data Sheet, Rev. 2.04
644
Freescale Semiconductor