MC9S12HZ256 Datasheet, PDF (617/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 22 Module Mapping Control (MMCV4)
In emulation modes, if the EMK bit in the MODE register (see MEBI block description chapter) is set, the
data and data direction registers for port K are removed from the on-chip memory map and become
external accesses.
22.4.2.2 Emulation Chip Select Signal
When the EMK bit in the MODE register (see MEBI block description chapter) is set, port K bit 7 is used
as an active-low emulation chip select signal, ECS. This signal is active when the system is in emulation
mode, the EMK bit is set and the FLASH or ROM space is being addressed subject to the conditions
outlined in Section 22.4.3.2, “Extended Address (XAB19:14) and ECS Signal Functionality.” When the
EMK bit is clear, this pin is used for general purpose I/O.
22.4.2.3 External Chip Select Signal
When the EMK bit in the MODE register (see MEBI block description chapter) is set, port K bit 6 is used
as an active-low external chip select signal, XCS. This signal is active only when the ECS signal described
above is not active and when the system is addressing the external address space. Accesses to
unimplemented locations within the register space or to locations that are removed from the map (i.e., ports
A and B in expanded modes) will not cause this signal to become active. When the EMK bit is clear, this
pin is used for general purpose I/O.
22.4.3 Memory Expansion
The HCS12 core architecture limits the physical address space available to 64K bytes. The program page
index register allows for integrating up to 1M byte of FLASH or ROM into the system by using the six
page index bits to page 16K byte blocks into the program page window located from 0x8000 to 0xBFFF
in the physical memory space. The paged memory space can consist of solely on-chip memory or a
combination of on-chip and off-chip memory. This partitioning is configured at system integration through
the use of the paging configuration switches (pag_sw1:pag_sw0) at the core boundary. The options
available to the integrator are as given in Table 22-16 (this table matches Table 22-12 but is repeated here
for easy reference).
Table 22-16. Allocated Off-Chip Memory Options
pag_sw1:pag_sw0
00
01
10
11
Off-Chip Space
876K bytes
768K bytes
512K bytes
0K byte
On-Chip Space
128K bytes
256K bytes
512K bytes
1M byte
Based upon the system configuration, the program page window will consider its access to be either
internal or external as defined in Table 22-17.
MC9S12HZ256 Data Sheet, Rev. 2.04
Freescale Semiconductor
617