MC9S12HZ256 Datasheet, PDF (503/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 17 Dual Output Voltage Regulator (VREG3V3V2)
17.2 External Signal Description
Due to the nature of VREG3V3 being a voltage regulator providing the chip internal power supply
voltages most signals are power supply signals connected to pads.
Table 17-1 shows all signals of VREG3V3 associated with pins.
Table 17-1. VREG3V3 — Signal Properties
Name
V_DDR
V_DDA
V_SSA
V_DD
V_SS
V_DDPLL
V_SSPLL
V_REGEN (optional)
Port
Function
— VREG3V3 power input (positive supply)
— VREG3V3 quiet input (positive supply)
— VREG3V3 quiet input (ground)
— VREG3V3 primary output (positive supply)
— VREG3V3 primary output (ground)
— VREG3V3 secondary output (positive supply)
— VREG3V3 secondary output (ground)
— VREG3V3 (Optional) Regulator Enable
Reset State
—
—
—
—
—
—
—
—
Pull Up
—
—
—
—
—
—
—
—
NOTE
Check device overview chapter for connectivity of the signals.
17.2.1 V_DDR — Regulator Power Input
Signal V_DDR is the power input of VREG3V3. All currents sourced into the regulator loads flow through
this pin. A chip external decoupling capacitor (100 nF...220 nF, X7R ceramic) between V_DDR and V_SSR
can smoothen ripple on V_DDR.
For entering Shutdown Mode, pin V_DDR should also be tied to ground on devices without a V_REGEN pin.
17.2.2 V_DDA, V_SSA — Regulator Reference Supply
Signals V_DDA/V_SSA which are supposed to be relatively quiet are used to supply the analog parts of the
regulator. Internal precision reference circuits are supplied from these signals. A chip external decoupling
capacitor (100 nF...220 nF, X7R ceramic) between V_DDA and V_SSA can further improve the quality of this
supply.
MC9S12HZ256 Data Sheet, Rev. 2.04
Freescale Semiconductor
503