MC9S12HZ256 Datasheet, PDF (580/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 21 Multiplexed External Bus Interface (MEBIV3)
21.3.1 Module Memory Map
Table 21-2. MEBI Memory Map
Address
Offset
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
0x0009
0x000A
0x000B
0x000C
0x000D
0x000E
0x000F
0x001E
0x00032
0x00033
Use
Port A Data Register (PORTA)
Port B Data Register (PORTB)
Data Direction Register A (DDRA)
Data Direction Register B (DDRB)
Reserved
Reserved
Reserved
Reserved
Port E Data Register (PORTE)
Data Direction Register E (DDRE)
Port E Assignment Register (PEAR)
Mode Register (MODE)
Pull Control Register (PUCR)
Reduced Drive Register (RDRIV)
External Bus Interface Control Register (EBICTL)
Reserved
IRQ Control Register (IRQCR)
Port K Data Register (PORTK)
Data Direction Register K (DDRK)
21.3.2 Register Descriptions
Access
R/W
R/W
R/W
R/W
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
21.3.2.1 Port A Data Register (PORTA)
7
6
5
4
3
2
1
R
Bit 7
6
5
4
3
2
1
W
Reset
0
0
0
0
0
0
0
Single Chip PA7
PA6
PA5
PA4
PA3
PA2
PA1
Expanded Wide,
Emulation Narrow with AB/DB15
IVIS, and Peripheral
AB/DB14
AB/DB13
AB/DB12
AB/DB11
AB/DB10
AB/DB9
Expanded Narrow AB15 and AB14 and AB13 and AB12 and AB11 and AB10 and AB9 and
DB15/DB7 DB14/DB6 DB13/DB5 DB12/DB4 DB11/DB3 DB10/DB2 DB9/DB1
Figure 21-2. Port A Data Register (PORTA)
0
Bit 0
0
PA0
AB/DB8
AB8 and
DB8/DB0
MC9S12HZ256 Data Sheet, Rev. 2.04
580
Freescale Semiconductor