MC9S12HZ256 Datasheet, PDF (516/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 18 Background Debug Module (BDMV4)
PLLSEL
1
1
CLKSW
0
1
Table 18-3. BDM Clock Sources
BDMCLK
Alternate clock (refer to the device overview chapter to determine the alternate clock
source)
Bus clock dependent on the PLL
MC9S12HZ256 Data Sheet, Rev. 2.04
516
Freescale Semiconductor