MC9S12HZ256 Datasheet, PDF (46/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 1 MC9S12HZ256 Device Overview
1.6 System Clock Description
The clock and reset generator (CRG) provides the internal clock signals for the core and all peripheral
modules. Figure 1-12 shows the clock connections from the CRG to all modules.
Consult the CRG block description chapter for details on clock generation.
core clock
HCS12 CORE
BDM CPU
MEBI MMC
INT DBG
EXTAL
XTAL
CRG
bus clock
oscillator clock
Flash
RAM
EEPROM
TIM
ATD
PWM
SCI0, SCI1
SPI
CAN0, CAN1
IIC
MC
LCD
PIM
SSD1, SSD2,
SSD3, SSD4
Figure 1-12. Clock Connections
MC9S12HZ256 Data Sheet, Rev. 2.04
46
Freescale Semiconductor