MC9S12HZ256 Datasheet, PDF (488/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 16 Timer Module (TIM16B8CV1)
16.3.2.9 Timer Control Register 3/Timer Control Register 4 (TCTL3 and TCTL4)
R
W
Reset
7
EDG7B
0
6
EDG7A
5
EDG6B
4
EDG6A
3
EDG5B
2
EDG5A
0
0
0
0
0
Figure 16-16. Timer Control Register 3 (TCTL3)
1
EDG4B
0
0
EDG4A
0
R
W
Reset
7
EDG3B
0
Read: Anytime
Write: Anytime.
6
EDG3A
5
EDG2B
4
EDG2A
3
EDG1B
2
EDG1A
0
0
0
0
0
Figure 16-17. Timer Control Register 4 (TCTL4)
Table 16-10. TCTL3/TCTL4 Field Descriptions
1
EDG0B
0
0
EDG0A
0
Field
7:0
EDGnB
EDGnA
Description
Input Capture Edge Control — These eight pairs of control bits configure the input capture edge detector
circuits.
Table 16-11. Edge Detector Circuit Configuration
EDGnB
0
0
1
1
EDGnA
0
1
0
1
Configuration
Capture disabled
Capture on rising edges only
Capture on falling edges only
Capture on any edge (rising or falling)
MC9S12HZ256 Data Sheet, Rev. 2.04
488
Freescale Semiconductor