MC9S12HZ256 Datasheet, PDF (213/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 7 Analog-to-Digital Converter (ATD10B16CV4)
WRAP3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Table 7-3. Multi-Channel Wrap Around Coding
WRAP2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
WRAP1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
WRAP0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Multiple Channel Conversions
(MULT = 1) Wrap Around to AN0
after Converting
Reserved
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
AN15
7.3.2.2 ATD Control Register 1 (ATDCTL1)
Writes to this register will abort current conversion sequence but will not start a new sequence.
7
6
5
4
3
2
1
0
R
0
0
0
ETRIGSEL
ETRIGCH3 ETRIGCH2 ETRIGCH1 ETRIGCH0
W
Reset
0
0
0
0
1
1
1
1
= Unimplemented or Reserved
Read: Anytime
Figure 7-4. ATD Control Register 1 (ATDCTL1)
Write: Anytime
Table 7-4. ATDCTL1 Field Descriptions
Field
Description
7
ETRIGSEL
External Trigger Source Select — This bit selects the external trigger source to be either one of the AD
channels or one of the ETRIG[3:0] inputs. See device specification for availability and connectivity of
ETRIG[3:0] inputs. If ETRIG[3:0] input option is not available, writing a 1 to ETRISEL only sets the bit but has
no effect, that means one of the AD channels (selected by ETRIGCH[3:0]) remains the source for external
trigger. The coding is summarized in Table 7-5.
3:0
External Trigger Channel Select — These bits select one of the AD channels or one of the ETRIG[3:0] inputs
ETRIGCH[3:0] as source for the external trigger. The coding is summarized in Table 7-5.
MC9S12HZ256 Data Sheet, Rev. 2.04
Freescale Semiconductor
213