MC9S12HZ256 Datasheet, PDF (158/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 4 Port Integration Module (PIM9HZ256V2)
4.3.8.4 Port V Slew Rate Register (SRRV)
R
W
Reset
7
SRRV7
0
6
SRRV6
5
SRRV5
4
SRRV4
3
SRRV3
2
SRRV2
0
0
0
0
0
Figure 4-52. Port V Slew Rate Register (SRRV)
1
SRRV1
0
0
SRRV0
0
Read: anytime. Write: Anytime.
This register enables the slew rate control and disables the digital input buffer for port pins PV[7:0].
Table 4-37. SRRV Field Descriptions
Field
Description
7:0
Slew Rate Port V
SRRV[7:0] 0 Disables slew rate control and enables digital input buffer.
1 Enables slew rate control and disables digital input buffer.
4.3.8.5 Port V Pull Device Enable Register (PERV)
7
R
PERV7
W
6
PERV6
5
PERV5
4
PERV4
3
PERV3
2
PERV2
1
PERV1
0
PERV0
Reset
0
0
0
0
0
0
0
0
Figure 4-53. Port V Pull Device Enable Register (PERV)
Read: Anytime. Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated on configured input pins. If
a pin is configured as output, the corresponding Pull Device Enable Register bit has no effect.
Table 4-38. PERV Field Descriptions
Field
7:0
Pull Device Enable Port V
PERV[7:0] 0 Pull-up or pull-down device is disabled.
1 Pull-up or pull-down device is enabled.
Description
MC9S12HZ256 Data Sheet, Rev. 2.04
158
Freescale Semiconductor