MC9S12HZ256 Datasheet, PDF (545/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

19.3.2.3 Debug Trace Buffer Register (DBGTB)
Chapter 19 Debug Module (DBGV1)
15
R Bit 15
14
Bit 14
13
Bit 13
12
Bit 12
11
Bit 11
10
Bit 10
9
Bit 9
8
Bit 8
W
Reset
u
u
u
u
u
u
u
u
= Unimplemented or Reserved
Figure 19-6. Debug Trace Buffer Register High (DBGTBH)
R
W
Reset
Field
15:0
7
Bit 7
6
Bit 6
5
Bit 5
4
Bit 4
3
Bit 3
2
Bit 2
1
Bit 1
0
Bit 0
u
u
u
u
u
u
u
u
= Unimplemented or Reserved
Figure 19-7. Debug Trace Buffer Register Low (DBGTBL)
Table 19-7. DBGTB Field Descriptions
Description
Trace Buffer Data Bits — The trace buffer data bits contain the data of the trace buffer. This register can be read
only as a word read. Any byte reads or misaligned access of these registers will return 0 and will not cause the
trace buffer pointer to increment to the next trace buffer address. The same is true for word reads while the
debugger is armed. In addition, this register may appear to contain incorrect data if it is not read with the same
capture mode bit settings as when the trace buffer data was recorded (See Section 19.4.2.9, “Reading Data from
Trace Buffer”). Because reads will reflect the contents of the trace buffer RAM, the reset state is undefined.
MC9S12HZ256 Data Sheet, Rev. 2.04
Freescale Semiconductor
545