MC9S12HZ256 Datasheet, PDF (626/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Appendix A Electrical Characteristics
2 _{The device contains an internal voltage regulator to generate the logic and PLL supply out of the I/O supply. The}
absolute maximum ratings apply when the device is powered from an external source.
3 _{All digital I/O pins are internally clamped to VSSX1/2 and VDDX1/2, VSSM and VDDM or VSSA and VDDA.}
4 _{Ports PU and PV are internally clamped to VSSM and VDDM.}
5 _{Those pins are internally clamped to VSSPLL and VDDPLL.}
6 _{This pin is clamped low to VSSPLL, but not clamped high. This pin must be tied low in applications.}
A.1.6 ESD Protection and Latch-up Immunity
All ESD testing is in conformity with CDF-AEC-Q100 Stress test qualification for Automotive Grade
Integrated Circuits. During the device qualification ESD stresses were performed for the Human Body
Model (HBM), the Machine Model (MM) and the Charge Device Model.
A device will be defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
Table A-2. ESD and Latch-up Test Conditions
Model
Human Body
Machine
Latch-up
Description
Series Resistance
Storage Capacitance
Number of Pulse per pin
positive
negative
Series Resistance
Storage Capacitance
Number of Pulse per pin
positive
negative
Minimum input voltage limit
Maximum input voltage limit
Symbol
Value
Unit
R1
1500
W
C
100
pF
–
–
3
3
R1
0
W
C
200
pF
–
–
3
3
–2.5
V
7.5
V
Table A-3. ESD and Latch-Up Protection Characteristics
Num C
Rating
1 C Human Body Model (HBM)
2 C Machine Model (MM)
3 C Charge Device Model (CDM)
Symbol
V_HBM
V_MM
V_CDM
Min
2000
200
500
Max
Unit
–
V
–
V
–
V
MC9S12HZ256 Data Sheet, Rev. 2.04
626
Freescale Semiconductor