MC9S12HZ256 Datasheet, PDF (511/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 18 Background Debug Module (BDMV4)
• BKGD — Background interface pin
• TAGHI — High byte instruction tagging pin
• TAGLO — Low byte instruction tagging pin
• BKGD and TAGHI share the same pin.
• TAGLO and LSTRB share the same pin.
NOTE
Generally these pins are shared as described, but it is best to check the
device overview chapter to make certain. All MCUs at the time of this
writing have followed this pin sharing scheme.
18.2.1 BKGD — Background Interface Pin
Debugging control logic communicates with external devices serially via the single-wire background
interface pin (BKGD). During reset, this pin is a mode select input which selects between normal and
special modes of operation. After reset, this pin becomes the dedicated serial interface pin for the
background debug mode.
18.2.2 TAGHI — High Byte Instruction Tagging Pin
This pin is used to tag the high byte of an instruction. When instruction tagging is on, a logic 0 at the falling
edge of the external clock (ECLK) tags the high half of the instruction word being read into the instruction
queue.
18.2.3 TAGLO — Low Byte Instruction Tagging Pin
This pin is used to tag the low byte of an instruction. When instruction tagging is on and low strobe is
enabled, a logic 0 at the falling edge of the external clock (ECLK) tags the low half of the instruction word
being read into the instruction queue.
MC9S12HZ256 Data Sheet, Rev. 2.04
Freescale Semiconductor
511