MC9S12HZ256 Datasheet, PDF (127/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

4.3.1.4
Chapter 4 Port Integration Module (PIM9HZ256V2)
Port AD Reduced Drive Register (RDRAD)
7
R
RDRAD7
W
Reset
0
6
RDRAD6
5
RDRAD5
4
RDRAD4
3
RDRAD3
2
RDRAD2
0
0
0
0
0
Figure 4-5. Port AD Reduced Drive Register (RDRAD)
1
RDRAD1
0
0
RDRAD0
0
Read: Anytime. Write: Anytime.
This register configures the drive strength of configured output pins as either full or reduced. If a pin is
configured as input, the corresponding Reduced Drive Register bit has no effect.
Table 4-4. RDRAD Field Descriptions
Field
Description
7:0
Reduced Drive Port AD
RDRAD[7:0] 0 Full drive strength at output.
1 Associated pin drives at about 1/3 of the full drive strength.
4.3.1.5 Port AD Pull Device Enable Register (PERAD)
7
R
PERAD7
W
6
PERAD6
5
PERAD5
4
PERAD4
3
PERAD3
2
PERAD2
1
PERAD1
0
PERAD0
Reset
0
0
0
0
0
0
0
0
Figure 4-6. Port AD Pull Device Enable Register (PERAD)
Read: Anytime. Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated on configured input pins. If
a pin is configured as output, the corresponding Pull Device Enable Register bit has no effect.
Table 4-5. PERAD Field Descriptions
Field
7:0
Pull Device Enable Port AD
PERAD[7:0] 0 Pull-up or pull-down device is disabled.
1 Pull-up or pull-down device is enabled.
Description
MC9S12HZ256 Data Sheet, Rev. 2.04
Freescale Semiconductor
127