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MC9S12HZ256 Datasheet, PDF (655/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers
Appendix B PCB Layout Guidelines
Appendix B
PCB Layout Guidelines
The PCB must be carefully laid out to ensure proper operation of the voltage regulator as well as of the
MCU itself. The following rules must be observed:
• Every supply pair must be decoupled by a ceramic/tantalum capacitor connected as near as
possible to the corresponding pins (C1–C9).
• Central point of the ground star should be the VSS1 pin.
• Use low ohmic low inductance connections between VSS1, VSS2, VSSA, VSSX1,2 and VSSM1,2,3.
• VSSPLL must be directly connected to VSS1.
• Keep traces of VSSPLL, EXTAL and XTAL as short as possible and occupied board area for C10,
C11, C14 and Q1 as small as possible.
• Do not place other signals or supplies underneath area occupied by C10, C11, C14 and Q1 and the
connection area to the MCU.
• Central power input should be fed in at the VDDA/VSSA pins.
Table B-1. Recommended Components
Component
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
C11
C12
C13
C14
R1
Q1
Purpose
VDD1 filter cap
VDDA filter cap
VDDX2 filter cap
VDDR filter cap
VDDM3 filter cap
VDDM2 filter cap
VDDM1 filter cap
VDDX1 filter cap
VDDPLL filter cap
OSC load cap
OSC load cap
PLL loop filter cap
PLL loop filter cap
DC cutoff cap
PLL loop filter res
Quartz/Resonator
Type
Value
ceramic X7R
100 .. 220 nF
X7R/tantalum
>=100 nF
X7R/tantalum
>=100 nF
X7R/tantalum
>=100 nF
X7R/tantalum
>=100 nF
X7R/tantalum
>=100 nF
X7R/tantalum
>=100 nF
X7R/tantalum
>=100 nF
ceramic X7R
100 nF .. 220 nF
See CRG block description chapter
Example layouts are illustrated on Figure B-1 and Figure B-2.
MC9S12HZ256 Data Sheet, Rev. 2.04
Freescale Semiconductor
655