MC9S12HZ256 Datasheet, PDF (352/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 12 Freescale’s Scalable Controller Area Network (MSCANV2)
12.3.2.12 MSCAN Identifier Acceptance Control Register (CANIDAC)
The CANIDAC register is used for identifier acceptance control as described below.
R
W
Reset:
7
6
5
4
3
2
1
0
0
0
IDHIT2
IDHIT1
IDAM1
IDAM0
0
0
0
0
0
0
0
= Unimplemented
Figure 12-13. MSCAN Identifier Acceptance Control Register (CANIDAC)
0
IDHIT0
0
Read: Anytime
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1), except bits IDHITx, which are
read-only
Table 12-18. CANIDAC Register Field Descriptions
Field
Description
5:4
IDAM[1:0]
2:0
IDHIT[2:0]
Identifier Acceptance Mode — The CPU sets these flags to define the identifier acceptance filter organization
(see Section 12.4.3, “Identifier Acceptance Filter”). Table 12-19 summarizes the different settings. In filter closed
mode, no message is accepted such that the foreground buffer is never reloaded.
Identifier Acceptance Hit Indicator — The MSCAN sets these flags to indicate an identifier acceptance hit (see
Section 12.4.3, “Identifier Acceptance Filter”). Table 12-20 summarizes the different settings.
IDAM1
0
0
1
1
Table 12-19. Identifier Acceptance Mode Settings
IDAM0
0
1
0
1
Identifier Acceptance Mode
Two 32-bit acceptance filters
Four 16-bit acceptance filters
Eight 8-bit acceptance filters
Filter closed
Table 12-20. Identifier Acceptance Hit Indication
IDHIT2
IDHIT1
IDHIT0
Identifier Acceptance Hit
0
0
0
0
0
1
0
1
0
Filter 0 hit
Filter 1 hit
Filter 2 hit
0
1
1
1
0
0
1
0
1
Filter 3 hit
Filter 4 hit
Filter 5 hit
1
1
0
1
1
1
Filter 6 hit
Filter 7 hit
The IDHITx indicators are always related to the message in the foreground buffer (RxFG). When a
message gets shifted into the foreground buffer of the receiver FIFO the indicators are updated as well.
MC9S12HZ256 Data Sheet, Rev. 2.04
352
Freescale Semiconductor