MC9S12HZ256 Datasheet, PDF (299/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 10 Stepper Stall Detector (SSDV1)
Field
4
FTST
1:0
ACLKS
Table 10-8. SSDCTL Field Descriptions (continued)
Description
Factory Test — This bit is reserved for factory test and reads zero in user mode.
Accumulator Sample Frequency Select — This field sets the accumulator sample frequency by pre-scaling
the bus frequency by a factor of 8, 16, 32, or 64. A faster sample frequency can provide more accurate results
but cause the accumulator to overflow. Best results are achieved with a frequency between 500 kHz and 2 MHz.
Accumulator Sample Frequency = f_BUS / (8 x 2^ACLKS)
Table 10-9. Accumulator Sample Frequency
ACLKS
0
1
2
3
Frequency
f_BUS / 8
f_BUS / 16
f_BUS / 32
f_BUS / 64
f_BUS = 40
MHz
5.00 MHz
2.50 MHz
1.25 MHz
625 kHz
f_BUS = 25
MHz
3.12 MHz
1.56 MHz
781 kHz
391 kHz
f_BUS = 16
MHz
2.00 MHz
1.00 MHz
500 kHz
250 kHz
NOTE
A change in the accumulator sample frequency will not be effective until the
ITG bit is cleared.
10.3.2.4 Stepper Stall Detector Flag Register (SSDFLG)
7
6
5
4
3
2
1
R
0
0
0
0
0
0
MCZIF
W
Reset
0
0
0
0
0
0
0
= Unimplemented or Reserved
Read: anytime
Figure 10-5. Stepper Stall Detector Flag Register (SSDFLG)
0
AOVIF
0
Write: anytime.
l
Table 10-10. SSDFLG Field Descriptions
Field
Description
7
MCZIF
0
AOVIF
Modulus Counter Underflow Interrupt Flag — This flag is set when the modulus down-counter reaches
0x0000. If not masked (MCZIE = 1), a modulus counter underflow interrupt is pending while this flag is set. This
flag is cleared by writing a ‘1’ to the bit. A write of ‘0’ has no effect.
Accumulator Overflow Interrupt Flag — This flag is set when the Integration Accumulator has a positive or
negative overflow. If not masked (AOVIE = 1), an accumulator overflow interrupt is pending while this flag is set.
This flag is cleared by writing a ‘1’ to the bit. A write of ‘0’ has no effect.
MC9S12HZ256 Data Sheet, Rev. 2.04
Freescale Semiconductor
299