MC9S12HZ256 Datasheet, PDF (60/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 2 256 Kbyte Flash Module (FTS256K2V1)
2.3.1 Module Memory Map
The Flash memory map is shown in Figure 2-2. The HCS12 architecture places the Flash memory
addresses between 0x4000 and 0xFFFF which corresponds to three 16-Kbyte pages. The content of the
HCS12 core PPAGE register is used to map the logical middle page ranging from address 0x8000 to
0xBFFF to any physical 16 Kbyte page in the Flash memory. By placing 0x3E or 0x3F in the HCS12 Core
PPAGE register, the associated 16 Kbyte pages appear twice in the MCU memory map.
The FPROT register, described in Section 2.3.2.5, “Flash Protection Register (FPROT)”, can be set to
globally protect a Flash block. However, three separate memory regions, one growing upward from the
first address in the next-to-last page in the Flash block (called the lower region), one growing downward
from the last address in the last page in the Flash block (called the higher region), and the remaining
addresses in the Flash block, can be activated for protection. The Flash locations of these protectable
regions are shown in Table 2-2. The higher address region of Flash block 0 is mainly targeted to hold the
boot loader code because it covers the vector space. The lower address region of any Flash block can be
used for EEPROM emulation in an MCU without an EEPROM module because it can remain unprotected
while the remaining addresses are protected from program or erase.
Security information that allows the MCU to restrict access to the Flash module is stored in the Flash
configuration field found in Flash block 0, described in Table 2-1.
Table 2-1. Flash Configuration Field
Unpaged
Flash Address
0xFF00 – 0xFF07
0xFF08 – 0xFF0B
0xFF0C
0xFF0D
0xFF0E
0xFF0F
Paged Flash
Address
(PPAGE 0x3F)
0xBF00 – 0xBF07
Size
(Bytes)
8
0xBF08 – 0xBF0B
4
0xBF0C
1
0xBF0D
1
0xBF0E
1
0xBF0F
1
Description
Backdoor Comparison Key
Refer to Section 2.6.1, “Unsecuring the MCU using Backdoor Key
Access”
Reserved
Block 1 Flash Protection Byte
Refer to Section 2.3.2.7, “Flash Status Register (FSTAT)”
Block 0 Flash Protection Byte
Refer toSection 2.3.2.7, “Flash Status Register (FSTAT)”
Flash Nonvolatile Byte
Refer to Section 2.3.2.9, “Flash Control Register (FCTL)”
Flash Security Byte
Refer to Section 2.3.2.2, “Flash Security Register (FSEC)”
MC9S12HZ256 Data Sheet, Rev. 2.04
60
Freescale Semiconductor