English
Language : 

MC9S12HZ256 Datasheet, PDF (377/692 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers
Chapter 12 Freescale’s Scalable Controller Area Network (MSCANV2)
Syntax
SYNC_SEG
Transmit Point
Sample Point
Table 12-35. Time Segment Syntax
Description
System expects transitions to occur on the CAN bus during this
period.
A node in transmit mode transfers a new value to the CAN bus at
this point.
A node in receive mode samples the CAN bus at this point. If the
three samples per bit option is selected, then this point marks the
position of the third sample.
The synchronization jump width (see the Bosch CAN specification for details) can be programmed in a
range of 1 to 4 time quanta by setting the SJW parameter.
The SYNC_SEG, TSEG1, TSEG2, and SJW parameters are set by programming the MSCAN bus timing
registers (CANBTR0, CANBTR1) (see Section 12.3.2.3, “MSCAN Bus Timing Register 0 (CANBTR0)”
and Section 12.3.2.4, “MSCAN Bus Timing Register 1 (CANBTR1)”).
Table 12-36 gives an overview of the CAN compliant segment settings and the related parameter values.
NOTE
It is the user’s responsibility to ensure the bit time settings are in compliance
with the CAN standard.
Table 12-36. CAN Standard Compliant Bit Time Segment Settings
Time Segment 1
5 .. 10
4 .. 11
5 .. 12
6 .. 13
7 .. 14
8 .. 15
9 .. 16
TSEG1
4 .. 9
3 .. 10
4 .. 11
5 .. 12
6 .. 13
7 .. 14
8 .. 15
Time Segment 2
2
3
4
5
6
7
8
TSEG2
1
2
3
4
5
6
7
Synchronization
Jump Width
1 .. 2
1 .. 3
1 .. 4
1 .. 4
1 .. 4
1 .. 4
1 .. 4
SJW
0 .. 1
0 .. 2
0 .. 3
0 .. 3
0 .. 3
0 .. 3
0 .. 3
12.4.4 Timer Link
The MSCAN generates an internal time stamp whenever a valid frame is received or transmitted and the
TIME bit is enabled. Because the CAN specification defines a frame to be valid if no errors occur before
the end of frame (EOF) field is transmitted successfully, the actual value of an internal timer is written at
EOF to the appropriate time stamp position within the transmit buffer. For receive frames, the time stamp
is written to the receive buffer.
MC9S12HZ256 Data Sheet, Rev. 2.04
Freescale Semiconductor
377