EP2S130F1020I4 Datasheet, PDF (763/768 Pages) List of Unclassifed Manufacturers – Stratix II Device Handbook, Volume 1

High-Speed Board Layout Guidelines
Figure 11–34. Filtering Noise with a Ferrite Bead
V_CC Source
Ferrite Bead
V_CC
10 μF
f
Usually, elements on the PCB add high-frequency noise to the power
plane. To filter the high-frequency noise at the device, place decoupling
capacitors as close as possible to each V_CC and GND pair.
See the Operating Requirements for Altera Devices Data Sheet for more
information on bypass capacitors.
Power Distribution
A system can distribute power throughout the PCB with either power
planes or a power bus network.
You can use power planes on multi-layer PCBs that consist of two or more
metal layers that carry V_CC and GND to the devices. Because the power
plane covers the full area of the PCB, its DC resistance is very low. The
power plane maintains V_CC and distributes it equally to all devices while
providing very high current-sink capability, noise protection, and
shielding for the logic signals on the PCB. Altera recommends using
power planes to distribute power.
The power bus network—which consists of two or more wide-metal
traces that carry V_CC and GND to devices—is often used on two-layer
PCBs and is less expensive than power planes. When designing with
power bus networks, be sure to keep the trace widths as wide as possible.
The main drawback to using power bus networks is significant DC
resistance.
Altera recommends using separate analog and digital power planes. For
fully digital systems that do not already have a separate analog power
plane, it can be expensive to add new power planes. However, you can
create partitioned islands (split planes). Figure 11–35 shows an example
board layout with phase-locked loop (PLL) ground islands.
Altera Corporation
May 2007
11–27
Stratix II Device Handbook, Volume 2