EP2S130F1020I4 Datasheet, PDF (579/768 Pages) List of Unclassifed Manufacturers – Stratix II Device Handbook, Volume 1

Configuring Stratix II and Stratix II GX Devices
Figure 7–8. Single Device FPP Configuration Using an Enhanced Configuration
Device
VCC (1) VCC (1)
Stratix II Device
DCLK
DATA[7..0]
nSTATUS
CONF_DONE
nCONFIG
10 kΩ
nCEO N.C.
MSEL[3..0]
nCE
(3) (3)
10 kΩ
Enhanced
Configuration
Device
DCLK
DATA[7..0]
OE (3)
nCS (3)
nINIT_CONF (2)
GND
GND
Notes to Figure 7–8:
(1) The pull-up resistor should be connected to the same supply voltage as the
configuration device.
(2) The nINIT_CONF pin is available on enhanced configuration devices and has an
internal pull-up resistor that is always active. This means an external pull-up
resistor should not be used on the nINIT_CONF-nCONFIG line. The nINIT_CONF
pin does not need to be connected if its functionality is not used. If nINIT_CONF
is not used, nCONFIG must be pulled to V_CC either directly or through a resistor.
(3) The enhanced configuration devices’ OE and nCS pins have internal
programmable pull-up resistors. If internal pull-up resistors are used, external
pull-up resistors should not be used on these pins. The internal pull-up resistors
are used by default in the Quartus II software. To turn off the internal pull-up
resistors, check the Disable nCS and OE pull-ups on configuration device option
when generating programming files.
f
The value of the internal pull-up resistors on the enhanced configuration
devices can be found in the Enhanced Configuration Devices (EPC4, EPC8
& EPC16) Data Sheet in volume 2 of the Configuration Handbook.
When using enhanced configuration devices, you can connect the
device’s nCONFIG pin to nINIT_CONF pin of the enhanced configuration
device, which allows the INIT_CONF JTAG instruction to initiate device
configuration. The nINIT_CONF pin does not need to be connected if its
functionality is not used. If nINIT_CONF is not used, nCONFIG must be
pulled to V_CC either directly or through a resistor. An internal pull-up
resistor on the nINIT_CONF pin is always active in the enhanced
configuration devices, which means an external pull-up resistor should
not be used if nCONFIG is tied to nINIT_CONF.
Upon power-up, the Stratix II or Stratix II GX device goes through a POR.
The POR delay is dependent on the PORSEL pin setting; when PORSEL is
driven low, the POR time is approximately 100 ms, if PORSEL is driven
high, the POR time is approximately 12 ms. During POR, the device will
reset, hold nSTATUS low, and tri-state all user I/O pins. The
Altera Corporation
January 2008
7–27
Stratix II Device Handbook, Volume 2