EP2S130F1020I4 Datasheet, PDF(307/768 Page) List of Unclassifed Manufacturers – Stratix II Device Handbook, Volume 1

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

EP2S130F1020I4 Datasheet, PDF (307/768 Pages) List of Unclassifed Manufacturers – Stratix II Device Handbook, Volume 1

◁

PLLs in Stratix II and Stratix II GX Devices

â Applications that require a clock switchover feature and a small

frequency drift should use a low-bandwidth PLL. The

low-bandwidth PLL reacts slower than a high-bandwidth PLL to

reference input clock changes. When the switchover happens, a

low-bandwidth PLL propagates the stopping of the clock to the

output slower than a high-bandwidth PLL. A low-bandwidth PLL

filters out jitter on the reference clock. However, be aware that the

low-bandwidth PLL also increases lock time.

â Stratix II and Stratix II GX device PLLs can use both the automatic

clock switchover and the clkswitch input simultaneously.

Therefore, the switchover circuitry can automatically switch from the

primary to the secondary clock. Once the primary clock stabilizes

again, the clkswitch signal can switch back to the primary clock.

During switchover, the PLL_VCO continues to run and slows down,

generating frequency drift on the PLL outputs. The clkswitch

signal controls switchover with its rising edge only.

â If the clock switchover event is glitch-free, after the switch occurs,

there is still a finite resynchronization period to lock onto a new clock

as the VCO ramps up. The exact amount of time it takes for the PLL

to relock is dependent on the PLL configuration. Use the PLL

programmable bandwidth feature to adjust the relock time.

â If the phase relationship between the input clock to the PLL and

output clock from the PLL is important in your design, assert

areset for 10ns after performing a clock switchover. Wait for the

locked signal (or gated lock) to go high before re-enabling the output

clocks from the PLL.

â Figure 1â25 shows how the VCO frequency gradually decreases

when the primary clock is lost and then increases as the VCO locks

on to the secondary clock. After the VCO locks on to the secondary

clock, some overshoot can occur (an over-frequency condition) in the

VCO frequency.

Figure 1â25. VCO Switchover Operating Frequency

Primary Clock Stops Running

Frequency Overshoot

ÎFvco

Switchover Occurs

VCO Tracks Secondary Clock

Altera Corporation

July 2009

1â43

Stratix II Device Handbook, Volume 2

▷