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EP2S130F1020I4 Datasheet, PDF (587/768 Pages) List of Unclassifed Manufacturers – Stratix II Device Handbook, Volume 1
Configuring Stratix II and Stratix II GX Devices
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For more information on serial configuration devices, refer to the Serial
Configuration Devices (EPCS1, EPCS16, EPCS64, and EPCS128) Data Sheet
in volume 2 of the Configuration Handbook.
Serial configuration devices provide a serial interface to access
configuration data. During device configuration, Stratix II and
Stratix II GX devices read configuration data via the serial interface,
decompress data if necessary, and configure their SRAM cells. This
scheme is referred to as the AS configuration scheme because the device
controls the configuration interface. This scheme contrasts with the PS
configuration scheme, where the configuration device controls the
interface.
1
The Stratix II and Stratix II GX decompression and design
security features are fully available when configuring your
Stratix II or Stratix II GX device using AS mode.
Table 7–11 shows the MSEL pin settings when using the AS configuration
scheme.
Table 7–11. Stratix II and Stratix II GX MSEL Pin Settings for AS
Configuration Schemes Note (2)
Configuration Scheme
Fast AS (40 MHz) (1)
Remote system upgrade fast AS (40 MHz)
(1)
AS (20 MHz) (1)
Remote system upgrade AS (20 MHz) (1)
MSEL3 MSEL2 MSEL1 MSEL0
1
0
0
0
1
0
0
1
1
1
0
1
1
1
1
0
Notes to Table 7–11:
(1) Only the EPCS16 and EPCS64 devices support a DCLK up to 40 MHz clock; other
EPCS devices support a DCLK up to 20 MHz. Refer to the Serial Configuration
Devices (EPCS1, EPCS4, EPCS16, EPCS64, and EPCS128) Data Sheet in volume 2 of
the Configuration Handbook for more information.
(2) Note that AS mode is only applicable for 3.3-V configuration. If I/O bank 3 is less
than 3.3-V, level shifters are required on the output pins (DCLK,nCSO, and
ASDO) from the Stratix II or Stratix II GX device back to the EPCS device.
Serial configuration devices have a four-pin interface: serial clock input
(DCLK), serial data output (DATA), AS data input (ASDI), and an
active-low chip select (nCS). This four-pin interface connects to Stratix II
and Stratix II GX device pins, as shown in Figure 7–12.
Altera Corporation
January 2008
7–35
Stratix II Device Handbook, Volume 2