EP2S130F1020I4 Datasheet, PDF (702/768 Pages) List of Unclassifed Manufacturers – Stratix II Device Handbook, Volume 1

IEEE Std. 1149.1 BST Operation Control
Figure 9–6 shows the timing requirements for the IEEE Std. 1149.1 signals.
Figure 9–6. IEEE Std. 1149.1 Timing Waveforms
TMS
TDI
TCK
TDO
Signal
to Be
Captured
Signal
to Be
Driven
t_JCH
t_JCP
t_JCL
t_JPSU
t_JPZX
t_JSSU
t_JSZX
t_JPCO
t_JSH
t_JSCO
t_JPH
t_JPXZ
t_JSXZ
To start IEEE Std. 1149.1 operation, select an instruction mode by
advancing the TAP controller to the shift instruction register (SHIFT_IR)
state and shift in the appropriate instruction code on the TDI pin. The
waveform diagram in Figure 9–7 represents the entry of the instruction
code into the instruction register. Figure 9–7 shows the values of TCK,
TMS, TDI, TDO, and the states of the TAP controller. From the RESET state,
TMS is clocked with the pattern 01100 to advance the TAP controller to
SHIFT_IR.
Figure 9–7. Selecting the Instruction Mode
TCK
TMS
TDI
TDO
TAP_STATE
SHIFT_IR
RUN_TEST/IDLE SELECT_IR_SCAN
TEST_LOGIC/RESET SELECT_DR_SCAN
CAPTURE_IR
EXIT1_IR
9–10
Stratix II Device Handbook, Volume 2
Altera Corporation
January 2008