EP2S130F1020I4 Datasheet, PDF (575/768 Pages) List of Unclassifed Manufacturers – Stratix II Device Handbook, Volume 1

Configuring Stratix II and Stratix II GX Devices
Table 7–9. FPP Timing Parameters for Stratix II and Stratix II GX Devices (Part 2 of 2) Notes (1), (2)
Symbol
Parameter
Min
Max
t_DSU
Data setup time before rising edge on DCLK
5
t_DH
Data hold time after rising edge on DCLK
0
t_CH
DCLK high time
4
t_CL
DCLK low time
4
t_CLK
DCLK period
10
f_MAX
DCLK frequency
100
t_R
Input rise time
40
t_F
Input fall time
40
t_CD2UM CONF_DONE high to user mode (4)
20
100
t_{C D2 CU} CONF_DONE high to CLKUSR enabled
4  maximum
DCLK period
t_{C D 2 U M C} CONF_DONE high to user mode with
CLKUSR option on
t_{C D 2 C U}  (299 
CLKUSR period)
Units
ns
ns
ns
ns
ns
MHz
ns
ns
µs
Notes to Table 7–9:
(1) This information is preliminary.
(2) These timing parameters should be used when the decompression and design security feature are not used.
(3) This value is obtainable if users do not delay configuration by extending the nCONFIG or nSTATUS low pulse
width.
(4) The minimum and maximum numbers apply only if the internal oscillator is chosen as the clock source for starting
up the device.
Altera Corporation
January 2008
7–23
Stratix II Device Handbook, Volume 2