EP2S130F1020I4 Datasheet, PDF (703/768 Pages) List of Unclassifed Manufacturers – Stratix II Device Handbook, Volume 1

IEEE 1149.1 (JTAG) Boundary-Scan Testing for Stratix II and Stratix II GX Devices
The TDO pin is tri-stated in all states except in the SHIFT_IR and
SHIFT_DR states. The TDO pin is activated at the first falling edge of TCK
after entering either of the shift states and is tri-stated at the first falling
edge of TCK after leaving either of the shift states.
When the SHIFT_IR state is activated, TDO is no longer tri-stated, and the
initial state of the instruction register is shifted out on the falling edge of
TCK. TDO continues to shift out the contents of the instruction register as
long as the SHIFT_IR state is active. The TAP controller remains in the
SHIFT_IR state as long as TMS remains low.
During the SHIFT_IR state, an instruction code is entered by shifting
data on the TDI pin on the rising edge of TCK. The last bit of the
instruction code is clocked at the same time that the next state,
EXIT1_IR, is activated. Set TMS high to activate the EXIT1_IR state.
Once in the EXIT1_IR state, TDO becomes tri-stated again. TDO is always
tri-stated except in the SHIFT_IR and SHIFT_DR states. After an
instruction code is entered correctly, the TAP controller advances to
serially shift test data in one of three modes. The three serially shift test
data instruction modes are discussed on the following pages:
■ “SAMPLE/PRELOAD Instruction Mode” on page 9–11
■ “EXTEST Instruction Mode” on page 9–13
■ “BYPASS Instruction Mode” on page 9–15
SAMPLE/PRELOAD Instruction Mode
The SAMPLE/PRELOAD instruction mode allows you to take a snapshot of
device data without interrupting normal device operation. However, this
instruction is most often used to preload the test data into the update
registers prior to loading the EXTEST instruction. Figure 9–8 shows the
capture, shift, and update phases of the SAMPLE/PRELOAD mode.
Altera Corporation
January 2008
9–11
Stratix II Device Handbook, Volume 2