EP2S130F1020I4 Datasheet, PDF (383/768 Pages) List of Unclassifed Manufacturers – Stratix II Device Handbook, Volume 1

TriMatrix Embedded Memory Blocks in Stratix II and Stratix II GX Devices
Input/Output Clock Mode
Stratix II and Stratix II GX TriMatrix memory blocks can implement
input/output clock mode for true and simple dual-port memory. On each
of the two ports, A and B, one clock controls all registers for the following
inputs into the memory block: data input, write enable, and address. The
other clock controls the blocks’ data output registers. Each memory block
port also supports independent clock enables for input and output
registers. Asynchronous clear signals for the registers, however, are not
supported.
Figures 2–13 through 2–15 show the memory block in input/output clock
mode for true dual-port, simple dual-port, and single-port modes,
respectively.
Altera Corporation
January 2008
2–23
Stratix II Device Handbook, Volume 2