EP2S130F1020I4 Datasheet, PDF (641/768 Pages) List of Unclassifed Manufacturers – Stratix II Device Handbook, Volume 1

Configuring Stratix II and Stratix II GX Devices
JTAG-chain device programming is ideal when the system contains
multiple devices, or when testing your system using JTAG BST circuitry.
Figure 7–36 shows multi-device JTAG configuration.
Figure 7–36. JTAG Configuration of Multiple Devices Using a Download Cable
Download Cable
10-Pin Male Header
(JTAG Mode)
(1) VCC
Pin 1
10 kΩ
VCC _{(1) VCC}
10 kΩ
(1) VCC
(1) VCC (1) VCC
(1) VCC (1) VCC
(1) VCC
10 kΩ _{Stratix II Device}
10 kΩ
10 kΩ
Stratix II Device
10 kΩ
10 kΩ
Stratix II Device
10 kΩ
nSTATUS
(2) _nCONFIG
CONF_DONE
(2) MSEL[3..0]
nSTATUS
(2) _nCONFIG
CONF_DONE
(2) MSEL0
(2) MSEL[3..0]
nSTATUS
(2) _nCONFIG
CONF_DONE
(2) MSEL0
(2) MSEL[3..0]
nCE (4)
VCC
nCE (4)
VCC
nCE (4)
VCC
VIO
(3)
TRST
TDI
TDO
TRST
TDI
TDO
TRST
TDI
TDO
TMS TCK
TMS TCK
TMS TCK
1 kΩ
Notes to Figure 7–36:
(1) The pull-up resistor should be connected to the same supply voltage as the USB Blaster, MasterBlaster (V_IO pin),
ByteBlaster II or ByteBlasterMV cable.
(2) The nCONFIG, MSEL[3..0] pins should be connected to support a non-JTAG configuration scheme. If only JTAG
configuration is used, connect nCONFIG to V_CC, and MSEL[3..0] to ground. Pull DCLK either high or low,
whichever is convenient on your board.
(3) Pin 6 of the header is a V_{I O} reference voltage for the MasterBlaster output driver. V_IO should match the device’s
V_CCIO. Refer to the MasterBlaster Serial/USB Communications Cable User Guide for this value. In the ByteBlasterMV
cable, this pin is a no connect. In the USB Blaster and ByteBlaster II cables, this pin is connected to nCE when it is
used for active serial programming, otherwise it is a no connect.
(4) nCE must be connected to GND or driven low for successful JTAG configuration.
The nCE pin must be connected to GND or driven low during JTAG
configuration. In multi-device FPP, AS, PS, and PPA configuration chains,
the first device’s nCE pin is connected to GND while its nCEO pin is
connected to nCE of the next device in the chain. The last device’s nCE
input comes from the previous device, while its nCEO pin is left floating.
In addition, the CONF_DONE and nSTATUS signals are all shared in
multi-device FPP, AS, PS, or PPA configuration chains so the devices can
enter user mode at the same time after configuration is complete. When
the CONF_DONE and nSTATUS signals are shared among all the devices,
every device must be configured when JTAG configuration is performed.
If you only use JTAG configuration, Altera recommends that you connect
the circuitry as shown in Figure 7–36, where each of the CONF_DONE and
nSTATUS signals are isolated, so that each device can enter user mode
individually.
Altera Corporation
January 2008
7–89
Stratix II Device Handbook, Volume 2