EP2S130F1020I4 Datasheet, PDF (753/768 Pages) List of Unclassifed Manufacturers – Stratix II Device Handbook, Volume 1

Figure 11–19. Star Routing
High-Speed Board Layout Guidelines
Termination
Resistor
Device 1
Device 2
Main Bus
Clock
Source
Device 3
Device Pin
(BGA Ball)
Serpentine Routing
When a design requires equal-length traces between the source and
multiple loads, you can bend some traces to match trace lengths (see
Figure 11–20). However, improper trace bending affects signal integrity
and propagation delay. To minimize crosstalk, ensure that S  3  H,
where S is the spacing between the parallel sections and H is the height of
the signal trace above the reference ground plane (see Figure 11–21).
Altera Corporation
May 2007
11–17
Stratix II Device Handbook, Volume 2