EP2S130F1020I4 Datasheet, PDF (25/768 Pages) List of Unclassifed Manufacturers – Stratix II Device Handbook, Volume 1

Stratix II Architecture
completely backward-compatible with four-input LUT architectures. One
ALM can also implement any function of up to six inputs and certain
seven-input functions.
In addition to the adaptive LUT-based resources, each ALM contains two
programmable registers, two dedicated full adders, a carry chain, a
shared arithmetic chain, and a register chain. Through these dedicated
resources, the ALM can efficiently implement various arithmetic
functions and shift registers. Each ALM drives all types of interconnects:
local, row, column, carry chain, shared arithmetic chain, register chain,
and direct link interconnects. Figure 2–5 shows a high-level block
diagram of the Stratix II ALM while Figure 2–6 shows a detailed view of
all the connections in the ALM.
Figure 2–5. High-Level Block Diagram of the Stratix II ALM
carry_in
shared_arith_in
reg_chain_in
dataf0
datae0
dataa
datab
datac
datad
datae1
dataf1
Combinational
Logic
adder0
adder1
DQ
reg0
DQ
reg1
carry_out
shared_arith_out
reg_chain_out
To general or
local routing
To general or
local routing
To general or
local routing
To general or
local routing
Altera Corporation
May 2007
2–7
Stratix II Device Handbook, Volume 1