EP2S130F1020I4 Datasheet, PDF (588/768 Pages) List of Unclassifed Manufacturers – Stratix II Device Handbook, Volume 1

Active Serial Configuration (Serial Configuration Devices)
Figure 7–12. Single Device AS Configuration
V_CC (1) V_CC (1) V_CC (1)
Serial Configuration
Device
DATA
DCLK
nCS
ASDI
10 kΩ 10 kΩ 10 kΩ
Stratix II or Stratix II GX FPGA
nSTATUS
CONF_DONE
nCONFIG
nCE
nCEO
N.C.
GND
DATA0
V_CC
(3) MSEL3
DCLK
(3) MSEL2
nCSO
(3) MSEL1
ASDO
(3) MSEL0
(2)
GND
Notes to Figure 7–12:
(1) Connect the pull-up resistors to a 3.3-V supply.
(2) Stratix II and Stratix II GX devices use the ASDO to ASDI path to control the
configuration device.
(3) If using an EPCS4 device, MSEL[3..0] should be set to 1101. Refer to Table 7–11
for more details.
f
Upon power-up, the Stratix II and Stratix II GX devices go through a
POR. The POR delay is dependent on the PORSEL pin setting. When
PORSEL is driven low, the POR time is approximately 100 ms. If PORSEL
is driven high, the POR time is approximately 12 ms. During POR, the
device will reset, hold nSTATUS and CONF_DONE low, and tri-state all
user I/O pins. Once the device successfully exits POR, all user I/O pins
continue to be tri-stated. If nIO_pullup is driven low during power-up
and configuration, the user I/O pins and dual-purpose I/O pins will
have weak pull-up resistors which are on (after POR) before and during
configuration. If nIO_pullup is driven high, the weak pull-up resistors
are disabled.
The value of the weak pull-up resistors on the I/O pins that are on before
and during configuration can be found in the DC & Switching
Characteristics chapter in volume 1 of the Stratix II Device Handbook and
the DC & Switching Characteristics chapter in volume 1 of the Stratix II GX
Device Handbook.
The configuration cycle consists of three stages: reset, configuration and
initialization. While nCONFIG or nSTATUS are low, the device is in reset.
After POR, the Stratix II and Stratix II GX devices release nSTATUS,
which is pulled high by an external 10-k pull-up resistor, and enters
configuration mode.
7–36
Stratix II Device Handbook, Volume 2
Altera Corporation
January 2008