EP2S130F1020I4 Datasheet, PDF (200/768 Pages) List of Unclassifed Manufacturers – Stratix II Device Handbook, Volume 1

Timing Model
I/O Delays
See Tables 5–72 through 5–76 for I/O delays.
Table 5–72. I/O Delay Parameters
Symbol
t_{D I P}
t_{O P}
t_{P C O U T}
t_{P I}
Parameter
Delay from I/O datain to output pad
Delay from I/O output register to output pad
Delay from input pad to I/O dataout to core
Delay from input pad to I/O input register
Table 5–73. Stratix II I/O Input Delay for Column Pins (Part 1 of 3)
I/O Standard Parameter
LVTTL
2.5 V
1.8 V
1.5 V
LVCMOS
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
1.5-V HSTL
Class I
t_{P I}
t_{P C O U T}
t_{P I}
t_{P C O U T}
t_{P I}
t_{P C O U T}
t_{P I}
t_{P C O U T}
t_{P I}
t_{P C O U T}
t_{P I}
t_{P C O U T}
t_{P I}
t_{P C O U T}
t_{P I}
t_{P C O U T}
t_{P I}
t_{P C O U T}
t_{P I}
t_{P C O U T}
Minimum Timing
Industrial Commercial
-3 Speed
Grade
(2)
-3 Speed
Grade
(3)
-4 Speed
Grade
-5 Speed
Grade
Unit
674
707
1223
1282
1405
1637 ps
408
428
787
825
904
1054 ps
684
717
1210
1269
1390
1619 ps
418
438
774
812
889
1036 ps
747
783
1366
1433
1570
1829 ps
481
504
930
976
1069
1246 ps
749
786
1436
1506
1650
1922 ps
483
507
1000
1049
1149
1339 ps
674
707
1223
1282
1405
1637 ps
408
428
787
825
904
1054 ps
507
530
818
857
939
1094 ps
241
251
382
400
438
511
ps
507
530
818
857
939
1094 ps
241
251
382
400
438
511
ps
543
569
898
941
1031
1201 ps
277
290
462
484
530
618
ps
543
569
898
941
1031
1201 ps
277
290
462
484
530
618
ps
560
587
993
1041
1141
1329 ps
294
308
557
584
640
746
ps
5–54
Stratix II Device Handbook, Volume 1
Altera Corporation
April 2011