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EP2S130F1020I4 Datasheet, PDF (39/768 Pages) List of Unclassifed Manufacturers – Stratix II Device Handbook, Volume 1 | |||
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Stratix II Architecture
Figure 2â15. Register Chain within an LAB Note (1)
Combinational
Logic
adder0
adder1
Combinational
Logic
adder0
adder1
reg_chain_in
From Previous ALM
Within The LAB
DQ
reg0
To general or
local routing
To general or
local routing
DQ
reg1
DQ
reg0
To general or
local routing
To general or
local routing
To general or
local routing
To general or
local routing
DQ
reg1
To general or
local routing
To general or
local routing
reg_chain_out
To Next ALM
within the LAB
Note to Figure 2â15:
(1) The combinational or adder logic can be utilized to implement an unrelated, un-registered function.
See the âMultiTrack Interconnectâ on page 2â22 section for more
information on register chain interconnect.
Altera Corporation
May 2007
2â21
Stratix II Device Handbook, Volume 1
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