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Spartan-3 FPGA Family: Pinout Descriptions
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Table 1: Types of Pins on Spartan-3 FPGAs (Continued)
Type/
Color
Code
Description
GND
Dedicated ground pin. The number of GND pins depends on the
package used. All must be connected.
VCCAUX Dedicated auxiliary power supply pin. The number of VCCAUX
pins depends on the package used. All must be connected to
+2.5V.
VCCINT
Dedicated internal core logic power supply pin. The number of
VCCINT pins depends on the package used. All must be
connected to +1.2V.
VCCO
Dedicated I/O bank, output buffer power supply pin. Along with
other VCCO pins in the same bank, this pin supplies power to the
output buffers within the I/O bank and sets the input threshold
voltage for some I/O standards.
GCLK
Dual-purpose pin that is either a user-I/O pin or an input to a
specific global buffer input. Every package has eight dedicated
GCLK pins.
N.C. This package pin is not connected in this specific
device/package combination but may be connected in larger
devices in the same package.
Notes:
1. # = I/O bank number, an integer between 0 and 7.
GND
Pin Name(s) in Type
VCCAUX
VCCINT
VCCO_#
TQ144 Package Only:
VCCO_LEFT, VCCO_TOP,
VCCO_RIGHT, VCCO_BOTTOM
IO_Lxxy_#/GCLK0, IO_Lxxy_#/GCLK1,
IO_Lxxy_#/GCLK2, IO_Lxxy_#/GCLK3,
IO_Lxxy_#/GCLK4, IO_Lxxy_#/GCLK5,
IO_Lxxy_#/GCLK6, IO_Lxxy_#/GCLK7
N.C.
I/Os with Lxxy_# are part of a differential output pair. ‘L’ indi-
cates differential output capability. The “xx” field is a
two-digit integer, unique to each bank that identifies a differ-
ential pin-pair. The ‘y’ field is either ‘P’ for the true signal or
‘N’ for the inverted signal in the differential pair. The ‘#’ field
is the I/O bank number.
Pin Definitions
Table 2 provides a brief description of each pin listed in the
Spartan-3 pinout tables and package footprint diagrams.
Pins are categorized by their pin type, as listed in Table 1.
See Detailed, Functional Pin Descriptions for more infor-
mation.
2
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