XC3S50 Datasheet, PDF (49/192 Pages) Xilinx, Inc – Revolutionary 90-nanometer process technology

Spartan-3 FPGA Family: DC and Switching Characteristics
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Table 2: Supply Voltage Thresholds for Power-On Reset
Symbol
Description
Min
Max
Units
V_CCINTT
Threshold for the V_CCINT supply
0.4
1.0
V
V_CCAUXT
Threshold for the V_CCAUX supply
0.8
2.0
V
V_CCO4T
Threshold for the V_CCO Bank 4 supply
0.4
1.0
V
Notes:
1. V_CCINT, V_CCAUX, and V_CCO supplies may be applied in any order.
2. To ensure successful power-on, V_CCINT, V_CCO Bank 4, and V_CCAUX supplies must rise through their respective threshold-voltage
ranges with no dips at any point.
Table 3: Other Power-On Requirements
Symbol
Description
Device Revision
Min
T_CCO
V_CCO ramp time for all eight banks 0
XC3S200, XC3S400,
600
and XC3S1500 in the
FT and FG packages⁽¹⁾
All other devices
2.0
Future
To be
improved
Notes:
1. This specification is based on characterization.
2. At present, there are no ramp requirements for the V_CCINT and V_CCAUX supplies.
Max
-
-
-
Units
µs
ms
Table 4: Power Voltage Levels Necessary for Preserving RAM Contents
Symbol
Description
V_DRINT
V_CCINT level required to retain RAM data
V_DRAUX
V_CCAUX level required to retain RAM data
Notes:
1. RAM contents include configuration data.
2. The level of the V_CCO supply has no effect on data retention.
Min
Units
1.0
V
2.0
V
2
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DS099-3 (v1.3) March 4, 2004
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