XC3S50 Datasheet, PDF (6/192 Pages) Xilinx, Inc – Revolutionary 90-nanometer process technology

R
Ordering Information
Example:
Device Type
Speed Grade
Spartan-3 FPGA Family: Introduction and Ordering Information
XC3S50 -4 PQ208 C
Temperature Range
Package Type / Number of Pins
Device
XC3S50
XC3S200
XC3S400
XC3S1000
XC3S1500
XC3S2000
XC3S4000
XC3S5000
Speed Grade
Package Type / Number of Pins
-4 Standard Performance VQ100 100-pin Very Thin Quad Flat Pack (VQFP)
-5 High Performance
TQ144 144-pin Thin Quad Flat Pack (TQFP)
PQ208 208-pin Plastic Quad Flat Pack (PQFP)
FT256 256-ball Fine-Pitch Thin Ball Grid Array (FTBGA)
FG320 320-ball Fine-Pitch Ball Grid Array (FBGA)
FG456 456-ball Fine-Pitch Ball Grid Array (FBGA)
FG676 676-ball Fine-Pitch Ball Grid Array (FBGA)
FG900 900-ball Fine-Pitch Ball Grid Array (FBGA)
FG1156 1156-ball Fine-Pitch Ball Grid Array (FBGA)
Temperature Range (T_J)
C Commercial (0°C to 85°C)
I Industrial (–40°C to 100°C)
Package Marking
Device Type
Package
Speed Grade
Operating Range
R
SPARTAN ^R
XC3S50^TM
PQ208xxx0350
xxxxxxxxx
4C
Date Code
Lot Code
ds099-1_02_122403
Revision History
Date Version No.
Description
04/11/03
1.0
Initial Xilinx release.
04/24/03
1.1
Updated block RAM, DCM, and multiplier counts for the XC3S50.
12/24/03
1.2
Added the FG320 package.
The Spartan-3 Family Data Sheet
DS099-1, Spartan-3 FPGA Family: Introduction and Ordering Information (Module 1)
DS099-2, Spartan-3 FPGA Family: Functional Description (Module 2)
DS099-3, Spartan-3 FPGA Family: DC and Switching Characteristics (Module 3)
DS099-4, Spartan-3 FPGA Family: Pinout Descriptions (Module 4)
DS099-1 (v1.2) December 24, 2003
www.xilinx.com
5
Advance Product Specification
1-800-255-7778