XC3S50 Datasheet, PDF (71/192 Pages) Xilinx, Inc – Revolutionary 90-nanometer process technology

Spartan-3 FPGA Family: DC and Switching Characteristics
R
Table 22: Maximum Number of Simultaneously
Switching Outputs per V_CCO-GND Pair (Continued)
Package
Signal Standard
LVCMOS33⁽¹⁾ Slow 2
VQ100,
TQ144,
PQ208
FT256,
FG320,
FG456,
FG676,
FG900,
FG1156
76
4
46
6
27
8
20
12
13
16
10
24
9
Fast 2
44
4
26
6
16
8
12
12
10
16
7
24
3
LVDCI_33⁽¹⁾
13
LVDCI_DV2_33⁽¹⁾
7
LVTTL⁽¹⁾
Slow 2
60
4
41
6
29
8
22
12
13
16
11
24
9
Fast 2
34
4
20
6
15
8
12
12
10
16
9
24
5
Table 22: Maximum Number of Simultaneously
Switching Outputs per V_CCO-GND Pair (Continued)
Package
Signal Standard
PCI33_3⁽¹⁾
VQ100,
TQ144,
PQ208
FT256,
FG320,
FG456,
FG676,
FG900,
FG1156
SSTL18_I
17
SSTL18_I_DCI
SSTL2_I
13
SSTL2_I_DCI
15
SSTL2_II
9
SSTL2_II_DCI
5
Differential Standards
LDT_25
LVDS_25
LVDS_25_DCI
BLVDS_25
LVDSEXT_25
LVDSEXT_25_DCI
ULVDS_25
LVPECL_25
RSDS_25
Notes:
1. The numbers in this table are recommendations that assume
sound board layout practice. For cases that exceed these
maximum numbers, perform IBIS simulations to confirm
signal integrity.
24
www.xilinx.com
DS099-3 (v1.3) March 4, 2004
1-800-255-7778
Advance Product Specification