XC3S50 Datasheet, PDF (73/192 Pages) Xilinx, Inc – Revolutionary 90-nanometer process technology

Spartan-3 FPGA Family: DC and Switching Characteristics
Table 24: Synchronous 18 x 18 Multiplier Timing
Speed Grade
-5
-4
Symbol
Description
P Outputs Min
Max
Min
Max
Clock-to-Output Times
T_MULTCK
When reading from the
P[0]
-
0.76
-
0.88
Multiplier, the time from the
active transition at the C
P[15]
-
0.97
-
1.11
clock input to data
P[17]
-
1.17
-
1.34
appearing at the P outputs
P[19]
-
1.37
-
1.58
P[23]
-
1.78
-
2.04
P[31]
-
2.59
-
2.97
P[35]
-
3.00
-
3.44
Setup Times
T_MULIDCK
Time from the setup of data
-
at the A and B inputs to the
active transition at the C
input of the Multiplier
2.18
-
2.50
-
Hold Times
T_MULCKID
Time from the active
-
transition at the Multiplier’s
C input to the point where
data is last held at the A
and B inputs
0
-
0
-
Notes:
1. The numbers in this table are based on the operating conditions set forth in Table 5.
R
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
Table 25: Asynchronous 18 x 18 Multiplier Timing
Speed Grade
-5
-4
Symbol
Description
P Outputs
Max
Max
Propagation Times
T_MULT
The time it takes for data to travel
from the A and B inputs to the P
outputs
P[0]
P[15]
P[17]
1.25
1.44
2.88
3.31
3.10
3.56
P[19]
3.32
3.81
P[23]
3.75
4.31
P[31]
4.62
5.31
P[35]
5.06
5.81
Notes:
1. The numbers in this table are based on the operating conditions set forth in Table 5.
Units
ns
ns
ns
ns
ns
ns
ns
26
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