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XC3S50 Datasheet, PDF (100/192 Pages) Xilinx, Inc – Revolutionary 90-nanometer process technology
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Spartan-3 FPGA Family: Pinout Descriptions
Table 6: DonePin and DriveDone Bitstream Option Interaction
Single- or Multi-
DonePin DriveDone FPGA Design
Comments
Pullnone
No
Single
External pull-up resistor, with value between 330Ω to 3.3kΩ, required on
DONE.
Pullnone
No
Multi
External pull-up resistor, with value between 330Ω to 3.3kΩ, required on
common node connecting to all DONE pins.
Pullnone
Yes
Single
OK, no external requirements.
Pullnone
Yes
Multi
DriveDone on last device in daisy-chain only. No external requirements.
Pullup
No
Single
OK, but weak pull-up on DONE pin has slow rise time. May require 330 Ω
pull-up resistor for high CCLK frequencies.
Pullup
No
Multi
External pull-up resistor, with value between 330Ω to 3.3kΩ, required on
common node connecting to all DONE pins.
Pullup
Yes
Single
OK, no external requirements.
Pullup
Yes
Multi
DriveDone on last device in daisy-chain only. No external requirements.
M2, M1, M0: Configuration Mode Selection
These inputs select the mode to configure the FPGA. The
logic levels applied to the mode pins are sampled on the ris-
ing edge of INIT_B.
Table 7: Spartan-3 Configuration Mode Select Settings
Configuration Mode
M2
M1
M0
Master Serial
0
0
0
Slave Serial
1
1
1
Master Parallel
0
1
1
Slave Parallel
1
1
0
JTAG
1
0
1
Reserved
0
0
1
Reserved
0
1
0
Reserved
1
0
0
After Configuration
X
X
X
Notes:
1. X = don’t care, either 0 or 1.
In user mode, after configuration successfully completes,
any levels applied to these input are ignored. Each of the
bitstream generator options M0Pin, M1Pin, and M2Pin
determines whether a weak pull-up resistor, weak pull-down
resistor, or no resistor is present on its respective mode pin,
M0, M1, or M2.
HSWAP_EN: Disable Weak Pull-up Resistors Dur-
ing Configuration
A Low on this asynchronous pin enables weak pull-up resis-
tors on all user I/Os, although only until device configuration
completes. A High disables the weak pull-up resistors (dur-
ing configuration, which is the desired state for some appli-
cations.
Table 8: HSWAP_EN Encoding
HSWAP_EN
Function
During Configuration
0
Enable weak pull-up resistors on all pins
not actively involved in the configuration
process. Pull-ups are only active until
configuration completes. See Table 10.
1
No pull-up resistors during configuration.
After Configuration, User Mode
X
This pin has no function except during
device configuration.
Notes:
1. X = don’t care, either 0 or 1.
After configuration, HSWAP_EN essentially becomes a
"don’t care" input and any pull-up resistors previously
enabled by HSWAP_EN are disabled. If a user I/O in the
application requires a weak pull-up resistor after configura-
tion, place a PULLUP primitive on the associated I/O pin.
The Bitstream generator option HswapenPin determines
whether a weak pull-up resistor to VCCAUX, a weak
pull-down resistor, or no resistor is present on HSWAP_EN
after configuration.
JTAG: Dedicated JTAG Port Pins
These pins are dedicated connections to the four-wire IEEE
1532/IEEE 1149.1 JTAG port, shown in Figure 4 and
DS099-4 (v1.5) July 13, 2004
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Product Specification
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