1N4007 Datasheet, PDF (90/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A

TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
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6.6.2.1 PLL Secondary Control Register (SECCTL)
The PLL Secondary Control Register contains extra fields to control the Main PLL and is shown in
Figure 6-4 and described in Table 6-10.
Figure 6-4. PLL Secondary Control Register (SECCTL)
31
24
23
Reserved
BYPASS
R-0000 0000
RW-0
Legend: R/W = Read/Write; R = Read only; -n = value after reset
22
19
OUTPUT_DIVIDE
RW-0001
18
0
Reserved
RW-001 0000 0000 0000 0000
BIT
31-24
23
22-19
18-0
Table 6-10. PLL Secondary Control Register (SECCTL) Field Descriptions
FIELD
Reserved
BYPASS
OUTPUT_DIVIDE
Reserved
DESCRIPTION
Reserved
Main PLL Bypass Enable
• 0 = Main PLL Bypass disabled.
• 1 = Main PLL Bypass enabled.
Output Divider ratio bits.
• 0h = ÷1. Divide frequency by 1.
• 1h = ÷2. Divide frequency by 2.
• 2h - Fh = Reserved.
Reserved
90
Detailed Description
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