1N4007 Datasheet, PDF (125/236 Pages) Naina Semiconductor ltd. – General Purpose Rectifier 1.0A

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TMS320C6652, TMS320C6654
SPRS841D – MARCH 2012 – REVISED JUNE 2016
6.9.4 NMI and LRESET
Nonmaskable interrupts (NMI) can be generated by chip-level registers and the LRESET can be
generated by software writing into LPSC registers. LRESET and NMI can also be asserted by device pins
or watchdog timers. One NMI pin and one LRESET pin are shared by all CorePacs on the device. The
CORESEL[3:0] pins can be configured to select between the CorePacs available as shown in Table 6-32.
CORESEL[1:0]
PIN INPUT
XX
00
01
1x
00
01
1x
00
01
1x
LRESET
PIN INPUT
X
0
0
0
1
1
1
1
1
1
Table 6-32. LRESET and NMI Decoding
NMI
PIN INPUT
X
X
X
X
1
1
1
0
0
0
LRESETNMIEN
PIN INPUT
1
0
0
0
0
0
0
0
0
0
RESET MUX BLOCK OUTPUT
No local reset or NMI assertion.
Assert local reset to CorePac 0
Reserved
Assert local reset to all CorePacs
Deassert local reset and NMI to CorePac 0
Reserved
Deassert local reset and NMI to all CorePacs
Assert NMI to CorePac 0
Reserved
Assert NMI to all CorePacs
6.10 Memory Protection Unit (MPU)
The C6654 and C6652 support five MPUs:
• One MPU is used to protect main CORE/3 CFG TeraNet (CFG space of all slave devices on the
TeraNet is protected by the MPU).
• Two MPUs are used for QM_SS (one for the DATA PORT port and the other is for the CFG PORT
port).
• One MPU is used for Semaphore.
• One MPU is used for EMIF16
This section contains MPU register map and details of device-specific MPU registers only. For MPU
features and details of generic MPU registers, see the Memory Protection Unit (MPU) for KeyStone
Devices User's Guide.
Table 6-33 lists the configuration of each MPU and Table 6-34 lists the memory regions protected by each
MPU.
Table 6-33. MPU Default Configuration
SETTING
Default permission
Number of allowed IDs supported
Number of programmable ranges
supported
Compare width
MPU0 (MAIN CFG
TERANET)
Assume allowed
16
16
MPU1 (QM_SS
DATA PORT)
Assume allowed
16
5
1KB granularity
1KB granularity
MPU2 (QM_SS CFG MPU3
MPU4
PORT)
(SEMAPHORE) (EMIF16)
Assume allowed
Assume allowed Assume allowed
16
16
16
16
1
16
1KB granularity
1KB granularity 1KB granularity
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